将两个单个位转换为向量
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我有以下代码
module ALUControl(ALUOp, FuncCode, ALUCtl);
input [1:0] ALUOp;
input [5:0] FuncCode;
output reg [3:0] ALUCtl;
always @(ALUOp, FuncCode) begin
if ( ALUOp == 2 )
case (FuncCode)
32: ALUCtl<=2; // add
34: ALUCtl<=6; //subtract
36: ALUCtl<=0; // and
37: ALUCtl<=1; // or
39: ALUCtl<=12; // nor
42: ALUCtl<=7; // slt
default: ALUCtl<=15; // should not happen
endcase
else
case (ALUOp)
0: ALUCtl<=2;
1: ALUCtl<=6;
default: ALUCtl<=15; // should not happen
endcase
end
module Control(op0 , op1 , op2 , op3 , op4 ,op5 , MemtoReg, RegDst , RegWrite , MemRead , MemWrite ,Branch , ALUSrc, ALUOp1 , ALUOp2 , MemWrite);
input op0;
input op1;
input op2;
input op3;
input op4;
input op5;
output RegDst;
output ALUSrc;
output MemtoReg;
output MemWrite;
output MemRead ;
output RegWrite;
output Branch;
output ALUOp1;
output ALUOp2;
assign RegDst = (~op0)&(~op1)&(~op2)&(~op3)&(~op4)&(~op5);
assign ALUSrc = (((op0)&(op1)&(~op2)&(~op3)&(~op4)&(op5))| ((op0)&(op1)&(~op2)&(op3)&(~op4)&(op5)));
assign MemtoReg = ((op0)&(op1)&(~op2)&(~op3)&(~op4)&(op5));
assign RegWrite = ((~op0)&(~op1)&(~op2)&(~op3)&(~op4)&(~op5))|((op0)&(op1)&(~op2)&(~op3)&(~op4)&(op5));
assign MemRead = ((op0)&(op1)&(~op2)&(~op3)&(~op4)&(op5));
assign MemWrite = ((op0)&(op1)&(~op2)&(op3)&(~op4)&(op5));
assign Branch = ((~op0)&(~op1)&(op2)&(~op3)&(~op4)&(~op5));
assign ALUOp1 = ((~op0)&(~op1)&(~op2)&(~op3)&(~op4)&(~op5));
assign ALUOP2 = ((~op0)&(~op1)&(op2)&(~op3)&(~op4)&(~op5));
没有找到相关结果
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才脊烽馈低
你要：output [1:0] ALUOp; wire ALUOp1; wire ALUOp2; assign ALUOp = {ALUOp2, ALUOp1};